1. Field of the Invention
The present invention relates in general to RF power amplifiers and methods of amplifying an RF signal. More specifically, the present invention relates to feed forward power amplifiers and related methods.
2. Description of the Prior Art and Related Information
The two primary goals of RF power amplifier design are linearity over the range of power operation and efficiency. Linearity is simply the ability to amplify without distortion while efficiency is the ability to convert DC to RF energy with minimal wasted power and heat generation. Both these requirements are critical for modern wireless communication systems but it is increasingly difficult to provide both. This is due primarily to the bandwidth requirements of modern wireless communication systems which are placing increasing demands on amplifier linearity. As a practical matter the only way to provide the desired linearity has been to employ very large amplifiers operating in a low efficiency point of their operating range where they are more linear.
One approach to achieving higher linearity and good efficiency in RF power amplifiers is provided by feed forward amplifiers. In feed forward RF power amplifiers an error amplifier is employed to amplify only IMD products which are then combined with the main amplifier output to cancel the main amplifier IMDs. FIG. 1 illustrates a conventional feed forward amplifier design having a main amplifier 1 and an error amplifier 2. The basic elements also include delays 3, 4 in the main and error path, respectively, and main to error path couplers 5, 6, 7 and 8. Additional elements not shown are also typically present in a conventional feed forward architecture as is well known to those skilled in the art. The delays, couplers and error amplifier are designed to inject out of phase IMDs from the error path into the main amplifier output at coupler 8 to substantially eliminate the IMDs in the main amplifier path.
Generally, feed forward power amplifier design is based upon using class A or AB biased transistors, both in the main and error amplifiers. In order to obtain higher efficiency from the output stage LDMOS (Laterally Diffused Metal Oxide Semiconductor) devices in an amplifier, they must be biased towards lower class AB or in class B. However, when biased in this mode, considerable gain expansion occurs, especially at lower power outputs. This is illustrated in FIG. 2 which shows both conventional higher AB biasing and lower class AB or class B biasing. As shown a nonlinear gain expansion occurs in a small signal region (below input power Psst—small signal threshold). This gain expansion also creates a substantial amount of small signal intermodulation distortion products (SSIMDs). The error amplifier 2 operates essentially in pulsed mode, and draws practically only quiescent current. Biasing the output devices of the error amplifier at lower class AB or in class B further reduces quiescent current. However, lower class AB and class B biasing makes the error loop cancellation at coupler 8 input power dependent. This is contradictory to the fundamental concept of feed forward amplifier operation and is inherently difficult to deal with.
Therefore, when the main amplifier is biased in lower class AB or in class B, it generates substantial small signal IMDs. These IMD products in turn cause the error amplifier to draw substantially higher current to compensate so that any efficiency improvement is lost at the system level. As a result, an attempt to increase efficiency by biasing the amplifier devices at lower class AB or in class B is frustrated in this manner.
Therefore, a need presently exists for an RF power amplifier design which provides both high efficiency and reduced signal distortion.